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1 lt1313 dual pcmcia vpp driver/regulator n digital selection of 0v, v cc , 12v or hi-z n output current capability: 120ma n internal current limiting and thermal shutdown n automatic switching from 3.3v to 5v n powered from unregulated 13v to 20v supply n logic compatible with standard pcmcia controllers n output capacitors: 1 m f n quiescent current in hi-z or 0v mode: 60 m a n independent vpp valid status feedback signals n no vpp overshoot the lt ? 1313 is a member of linear technology corporations pcmcia driver/regulator family. it provides 0v, 3.3v, 5v, 12v and hi-z regulated power to the vpp pins of two pcmcia card slots from a single unregulated 13v to 20v supply. when used in conjunction with a pc card interface controller, the lt1313 forms a complete minimum component-count interface for palmtop, pen-based and note- book computers. the two vpp output voltages are inde- pendently selected by four logic compatible digital inputs which interface directly with industry standard pc card interface controllers. automatic 3.3v to 5v switching is provided by two inde- pendent comparators which continuously monitor each pc card v cc supply voltage and automatically adjust the vpp output to match the associated v cc pin voltage when the vpp = v cc mode is selected. two open-collector vpp valid outputs are provided to indicate when the vpp outputs are in regulation at 12v. the lt1313 is available in 16-pin so packaging. features descriptio n u n notebook computers n palmtop computers n pen-based computers n handi-terminals n bar-code readers n flash memory programming applicatio n s u typical applicatio n u vpp1 vpp2 pcmcia card slot #1 v cc vpp1 vpp2 pcmcia card slot #2 v cc asense avpp out gnd gnd lt1313 v s v s avalid aen0 aen1 bsense bvpp out bvalid ben0 ben1 13v to 20v + 1 m f tantalum 1 m f tantalum dual pcmcia card slot controller + 0.1 m f 3.3v/5v 3.3v/5v 1313 ta01 typical pcmcia dual slot vpp driver device description package lt1312 single pcmcia vpp driver/regulator 8-pin so lt1313 dual pcmcia vpp driver/regulator 16-pin so* ltc ? 1314 single pcmcia switch matrix 14-pin so ltc1315 dual pcmcia switch matrix 24-pin ssop ltc1470 protected v cc 5v/3.3v switch matrix 8-pin so ltc1472 protected v cc and vpp switch matrix 16-pin so* *narrow body linear technology pcmcia product family , ltc and lt are registered trademarks of linear technology corporation.
2 lt1313 symbol parameter conditions min typ max units vpp out output voltage program to 12v, i out 120ma (note 2) l 11.52 12.00 12.48 v program to 5v, i out 30ma (note 2) l 4.75 5.00 5.25 v program to 3.3v, i out 30ma (note 2) l 3.135 3.30 3.465 v program to 0v, i out = C 300 m a 0.42 0.60 v i lkg output leakage program to hi-z, 0v vpp out 12v l C10 10 m a i s supply current both channels programmed to 0v l 60 100 m a both channels programmed to hi-z l 60 100 m a one channel programmed to 12v, no load (note 3) l 260 400 m a one channel programmed to 5v, no load (note 3) l 105 150 m a one channel programmed to 3.3v, no load (note 3) l 85 120 m a one channel programmed to 12v, i out = 120ma (note 3) l 126 132 ma one channel programmed to 5v, i out = 30ma (note 3) l 31 33 ma one channel programmed to 3.3v, i out = 30ma (note 3) l 31 33 ma i lim current limit program to 3.3v, 5v or 12v (note 3) 330 500 ma v enh enable input high voltage l 2.4 v v enl enable input low voltage l 0.4 v i enh enable input high current 2.4v v in 5.5v 20 50 m a i enl enable input low current 0v v in 0.4v 0.01 1 m a v sen5 v cc sense threshold vpp out = 3.3v to 5v (note 4) l 3.60 4.05 4.50 v v sen3 v cc sense threshold vpp out = 5v to 3.3v (note 4) l 3.60 4.00 4.50 v i sen v cc sense input current v sense = 5v 38 60 m a v sense = 3.3v 18 30 m a v valid th vpp valid threshold voltage program to 12v, (note 5) l 10.5 11 11.5 v i valid vpp valid output drive current program to 12v, v valid = 0.4v, (note 5) 1 3.3 ma vpp valid output leakage current program to 0v, v valid = 12v, (note 5) 0.1 10 m a absolute m axi m u m ratings w ww u supply voltage ........................................................ 22v digital input voltage ........................ 7v to (gnd C 0.3v) sense input voltage ......................... 7v to (gnd C 0.3v) valid output voltage .................... 15v to (gnd C 0.3v) output short-circuit duration .......................... indefinite operating temperature ................................ 0 c to 70 c junction temperature................................ 0 c to 125 c storage temperature range ..................C65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c package/order i n for m atio n w u u electrical characteristics v s = 13v to 20v, t a = 25 c (note 1), unless otherwise noted. the l denotes the specifications which apply over the full operating temperature range. note 1: both v s pins (10, 14) must be connected together, and both ground pins (1, 5) must be connected together. note 2: for junction temperatures greater than 110 c, a minimum load of 1ma is recommended. note 3: the other channel is programmed to the 0v mode (xen0 = xen1 = 0v) during this test. note 4: the v cc sense threshold voltage tests are performed independently. note 5: the vpp valid tests are performed independently. t jmax = 125 c, q ja = 100 c/ w lt1313cs order part number consult factory for industrial and military grade parts. 1 2 3 4 5 6 7 8 top view s package 16-lead plastic so 16 15 14 13 12 11 10 9 gnd aen0 aen1 avalid gnd ben0 ben1 bvalid avpp out nc v s asense bvpp out nc v s bsense
3 lt1313 typical perfor m a n ce characteristics u w quiescent current (0v or hi-z mode) supply voltage (v) 0 quiescent current ( m a) 60 80 100 20 lt1313 g1 40 20 0 5 10 15 25 t j = 25? both channels programmed to 0v or both channels programmed to hi-z supply voltage (v) 0 quiescent current ( m a) 150 200 250 20 1313 g03 100 50 0 5 10 15 25 t j = 25? one channel programmed to vpp = v cc . other channel in 0v or hi-z mode r l = v sense = 5v v sense = 3.3v ground pin current (5v mode) ground pin current (12v mode) ground pin current current limit input voltage (v) 0 short-circuit current (ma) 300 400 500 15 25 1313 g08 200 100 0 510 20 600 700 800 t j = 25? xvpp out = 0v single channel current limit junction temperature (?) 0 short-circuit current (ma) 600 500 400 300 200 100 0 25 50 75 100 1313 g09 125 v s = 15v xvpp out = 0v single channel supply voltage (v) 0 ground current (ma) 2.5 2.0 1.5 1.0 0.5 0 20 1313 g06 5 10 15 25 t j = 25? 3.3v mode single output v sense = 3.3v r l = 110 w i l = 30ma* *for vpp out = 3.3v r l = 330 w i l = 10ma* supply voltage (v) 0 ground current (ma) 2.5 2.0 1.5 1.0 0.5 0 20 1313 g05 5 10 15 25 t j = 25? 5v mode single output v sense = 5v r l = 167 w i l = 30ma* *for vpp out = 5v r l = 500 w i l = 10ma* ground pin current (3.3v mode) quiescent current (3.3v/ 5v mode) quiescent current (12v mode) supply voltage (v) 0 quiescent current ( m a) 300 400 500 20 1313 g02 200 100 0 5 10 15 25 t j = 25? one channel programmed to 12v other channel in 0v or hi-z mode r l = supply voltage (v) 0 ground current (ma) 10 8 6 4 2 0 20 1313 g04 5 10 15 25 t j = 25 c 12v mode single output r l = 200 w i l = 60ma* *for vpp out = 12v r l = 400 w i l = 30ma* r l = 100 w i l = 120ma* output current (ma) 0 ground pin current (ma) 160 1313 g07 40 80 120 16 14 12 10 8 6 4 2 0 20 60 100 140 t j = 25? v s = 15v single channel
4 lt1313 typical perfor m a n ce characteristics u w junction temperature (?) 0 v cc sense threshold voltages (v) 5.5 5.0 4.5 4.0 3.5 3.0 2.5 25 50 75 100 1313 g12 125 t j = 25? v s = 15v switch to 5v switch to 3.3v v cc sense threshold voltage frequency (hz) 10 ripple rejection ratio (db) 100 1k 10k 100k 1m 1313 g15 100 80 60 40 20 0 t j = 25?, 12v mode v s = 15v + 100mv rms ripple c out = 1 m f tantalum ripple rejection (12v) time (ms) 0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 output voltage (v) en0 input (v) 12.4 12.2 12.0 11.8 11.6 5 0 1313 g16 c out = 1 m f c out = 10 m f v s = 15v 12v turn-on waveform time (ms) 0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 output voltage change (mv) supply voltage (v) 40 20 0 20 40 15 13 1313 g17 c out = 1? c out = 10? line transient response (12v) time (ms) 0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 output voltage change (v) load current (ma) 0.4 0.2 0 0.2 0.4 100 50 1313 g18 c out = 1 m f c out = 10 m f load transient response (12v) valid output current (ma) 0 valid output voltage (v) 1.0 0.8 0.6 0.4 0.2 0 0.5 1.0 1.5 2.0 1313 g14 2.5 3.0 t j = 25? v s = 15v 12v mode valid output voltage enable input current enable input voltage (v) 0 enable input current ( m a) 50 40 30 20 10 0 1 234 1313 g11 56 t j = 25? v s = 15v enable input threshold voltage junction temperature (?) 0 input threshold voltage (v) 3.0 2.5 2.0 1.5 1.0 0.5 0 25 50 75 100 1313 g10 125 v s = 15v v cc sense input current v cc sense input voltage (v) 0 v cc sense input current (?) 50 40 30 20 10 0 1 234 1313 g13 56 t j = 25? v s = 15v
5 lt1313 pi n fu n ctio n s uuu supply pins: power is supplied to the device through the two supply pins which must be connected together at all times . the supply pins should be bypassed to ground if the device is more than six inches away from the main supply capacitor. a bypass capacitor in the range of 0.1 m f to 1 m f is sufficient. the supply voltage to the lt1313 can be loosely regulated between 13v and 20v. vpp out pins: each regulated output supplies power to the two pcmcia card vpp pins which are typically tied to- gether at the socket. each vpp out output is current limited to approximately 330ma. thermal shutdown provides a second level of protection. a 1 m f to 10 m f tantalum output capacitor is recommended. input enable pins: the four digital input pins are high impedance inputs with approximately 20 m a input current at 2.4v. the input thresholds are compatible with cmos controllers and can be driven from either 5v or 3.3v cmos logic. esd protection diodes limit input excursions to 0.6v below ground. valid output pins: these pins are open-collector npn outputs which are driven low when the corresponding vpp out pin is in regulation, i.e., when it is above 11v. two external 51k pull-up resistors are connected between these outputs and the same 5v or 3.3v logic supply powering the pcmcia compatible control logic. v cc sense pins: two independent comparators and 4v references automatically switch the vpp out outputs from 5v to 3.3v depending upon the voltage sensed at the corresponding pcmcia card socket v cc pin. the input current for these pins is approximately 30 m a. for 5v only operation, connect the sense pins directly to ground. an esd protection diode limits the input voltage to 0.6v below ground. ground pins: the two ground pins must be connected together at all times. block diagra m w (one channel) + + xvpp out xv cc sense v s xen0 xen1 xvalid 1313 bd 11v low dropout linear regulator voltage logic control 4v x = a or b
6 lt1313 operatio n u the lt1313 is two programmable output voltage, low- dropout linear regulators designed specifically for pcmcia vpp drive applications. input power is typically obtained from a loosely regulated input supply between 13v and 20v. the lt1313 consists of the following blocks: two low dropout voltage linear regulators: the heart of the lt1313 is two pnp-based low-dropout voltage regulators which drop the unregulated supply voltage from 13v to 20v down to 12v, 5v, 3.3v, 0v or hi-z depending upon the state of the four enable inputs and the two v cc sense inputs. the regulators have built-in current limiting and thermal shutdown to protect the device, the loads, and the sockets against inadvertent short circuiting to ground. voltage control logic: the two vpp out outputs have five possible output modes: 0v, 3.3v, 5v, 12v and hi-z. these five modes are selected by the four enable inputs and the two v cc sense inputs as described by the truth table. v cc sense comparators: when the v cc mode is selected, the lt1313 automatically adjusts each regulated vpp output voltage to 3.3v or 5v depending upon the voltage present at the corresponding pc card v cc supply pin. the thresh- old voltage for these comparators is set at 4v and there is approximately 50mv of hysteresis provided to ensure clean switching between 3.3v and 5v. vpp valid comparator: two voltage comparators moni- tor each output voltage when the 12v mode is selected and are driven low when the output is in regulation above 11v. these two outputs function separately. aen0 aen1 asense avpp out avalid 00 x 0v 1 1 0 x 12v 0 0 1 3.0v to 3.6v 3.3v 1 0 1 4.5v to 5.5v 5v 1 1 1 x hi-z 1 x = dont care lt1313 truth table ben0 ben1 bsense bvpp out bvalid 00 x 0v 1 1 0 x 12v 0 0 1 3.0v to 3.6v 3.3v 1 0 1 4.5v to 5.5v 5v 1 1 1 x hi-z 1 note: each channel is independently controlled. the lt1313 is two voltage programmable linear regula- tors designed specifically for pcmcia vpp driver applica- tions. the device operates with very low quiescent current (60 m a) in the 0v and hi-z modes of operation. in the hi-z mode, the output leakage current falls to 1 m a. in addition to the low quiescent currents, the lt1313 incorporates several protection features which make it ideal for pcmcia applications. the lt1313 has built-in current limiting (330ma) and thermal shutdown to protect the device and the socket vpp pins against inadvertent short-circuit conditions. output capacitance the lt1313 is designed to be stable with a wide range of output capacitors. the minimum recommended value is a 1 m f with an esr of 3 w or less. the capacitor is connected directly between the output pin and ground. for applications where space is very limited, capacitors as low as 0.33 m f can applicatio n s i n for m atio n wu u u be used. extremely low esr ceramic capacitors with values less than 1 m f must have a 2 w resistor added in series with the output capacitor. transient and switching performance the lt1313 is designed to produce minimal overshoot with capacitors in the range of 1 m f to 10 m f. larger capacitor values can be used with a slowing of rise and fall times. the positive output slew rate is determined by the 330ma current limit and the output capacitor. the rise time for a 0v to 12v transition is approximately 40 m s and the rise time for a 10 m f capacitor is roughly 400 m s (see the transient response curves in the typical performance characteristics section).
7 lt1313 calculating junction temperature example: given an output voltage of 12v, an input supply voltage of 14v, and an output current of 100ma (one vpp output), and a maximum ambient temperature of 50 c, what will the maximum junction temperature be? power dissipated by the device will be equal to: i out (v s C vpp out ) + (i gnd v in ) where, i out = 100ma v in = 14v i gnd at (i out = 100ma, v in = 14v) = 5ma so, p d = 100ma (14v C12v) + (5ma 15v) = 0.275w using table 1, the thermal resistance will be in the range of 120 c/w to 131 c/w depending upon the copper area. so the junction temperature rise above ambient will be less than or equal to: 0.275w 131 c/w = 36 c the maximum junction temperature will then be equal to the junction temperature rise above ambient plus the maximum ambient temperature or: t jmax = 50 c + 36 c = 86 c for more detailed applications information, see the lt1312 single pcmcia vpp driver/regulator data sheet. the fall time from 12v to 0v is set by the output capacitor and an internal pull-down current source which sinks about 30ma. this source will fully discharge a 1 m f capaci- tor in less than 1ms. thermal considerations power dissipated by the device is the sum of two compo- nents: output current multiplied by the input-output differ- ential voltage: i out (v in C v out ), and ground pin current multiplied by supply voltage: (i gnd v in ). the ground pin current can be found by examining the ground pin current curves in the typical performance characteristics section. heat sinking, for surface mounted devices, is accom- plished by using the heat spreading capabilities of the pc board and its copper traces. the junction temperature of the lt1313 must be limited to 125 c to ensure proper operation. use table 1, in con- junction with the typical performance graphs, to calculate the power dissipation and die temperature for a particular application and ensure that the die temperature does not exceed 125 c under any operating conditions. table 1. 16-pin so package* copper area thermal resistance topside backside board area (junction-to-ambient) 2500 sq mm 2500 sq mm 2500 sq mm 120 c/w 1000 sq mm 2500 sq mm 2500 sq mm 120 c/w 225 sq mm 2500 sq mm 2500 sq mm 125 c/w 1000 sq mm 1000 sq mm 1000 sq mm 131 c/w * device is mounted on topside. applicatio n s i n for m atio n wu u u
8 lt1313 typical applicatio n s u dual slot pcmcia interface to cl-pd6720 vpp1 vpp2 pcmcia card slot #1 v cc vpp1 vpp2 pcmcia card slot #2 v cc 1313 ta02 5v asense avpp out gnd gnd lt1313 v s v s avalid aen0 aen1 bsense bvpp out bvalid ben0 ben1 13v to 20v 3.3v/5v 3.3v/5v 51k v logic 3.3v 10 m f + 1 m f a_vpp_pgm a_vpp_v cc av cc 5v av cc 3v bv cc 5v bv cc 3v cirrus logic cl-pd6720 q1 si9405dy q2 si9933dy q3 si9933dy b_vpp_pgm b_vpp_v cc vpp_valid av cc 5v av cc 3v bv cc 3v bv cc 5v + 1 m f 0.1 m f + 3.3v p-channel v cc switching 5v 10 m f q4 si9405dy q5 si9933dy q6 si9933dy + out1 to v cc slot 1 to v cc slot 2 out2 out3 gnd ltc1165cs8 v s in3 in1 in2 5v 5v 5v n-channel v cc switching using ltc1165 inverting n-channel drivers 3.3v q1 1 / 2 si9956dy q2 si9956dy q3 si9956dy 3.3v 5v q4 1 / 2 si9956dy q5 si9956dy q6 si9956dy out1 out2 out3 gnd ltc1165cs8 v s in3 in1 in2
9 lt1313 typical applicatio n s u dual slot pcmcia interface to 365 type controller vpp1 vpp2 pcmcia card slot #1 v cc vpp1 vpp2 pcmcia card slot #2 v cc 5v asense avpp out gnd gnd lt1313 v s v s avalid aen0 aen1 bsense bvpp out bvalid ben0 ben1 13v to 20v 3.3v/5v 3.3v/5v 51k v logic 3.3v 10 m f + 1 m f a_vpp_en0 a_vpp_en1 a:gp1 b_vpp_en0 a_v cc _en0 a_v cc _en1 b_v cc _en0 b_v cc _en1 b_vpp_en1 b:gp1 ?65?type controller 51k q3 si9956dy q2 si9956dy + 1 m f 0.1 m f + 10 m f + g1 g2 gnd ltc1157cs8 v s in1 in2 5v q1 1/2 si9956dy 1313 ta03 5v 3.3v q4 1/2 si9956dy q6 si9956dy q5 si9956dy g1 g2 gnd ltc1157cs8 v s in1 in2 5v
10 lt1313 typical applicatio n s u dual slot pcmcia driver/regulator powered from auxiliary winding on 5v inductor of ltc1142hv dual 5v/3.3v switching regulator 14v auxiliary supply d1 mbrs140 d2 mbrs140 d3 mbrs130t3 q4 vn7002 v in 6.5v to 18v c4 1000pf c2 1000pf c3 220? c1 68 m f c5 22? 1? 5v output q1 10 9 20 ltc1148 single 5v reg 15 14 v in aen0 aen1 avalid ben0 ben1 bvalid pdrive ndrive sense + sense note: see lt1312 data sheet applications section for further details on this circuit t1* 1.8t 30? q2 r4 22 w r1 100 w r3 18k r2 100 w r5 0.033 w 1313 ta04 q3 vn7002 + + + to ??slot vpp pins to ??slot vpp pins from ??slot v cc pin from ??slot v cc pin 1 m f + + asense avpp out gnd gnd lt1313 v s v s aen0 aen1 bsense bvpp out bvalid ben0 ben1 avalid *lpe-6562-a026 dale (605) 655-9301
11 lt1313 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. package descriptio n u dimensions in inches (millimeters) unless otherwise noted. s package 16-lead narrow plastic soic 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0??8?typ 0.008 ?0.010 (0.203 ?0.254) 1 2 3 4 5 6 7 8 0.150 ?0.157* (3.810 ?3.988) 16 15 14 13 0.386 ?0.394* (9.804 ?10.008) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 so16 0893 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.006 inch (0.15mm).
12 lt1313 lt/gp 0994 10k ? printed in usa ? linear technology corporation 1994 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7487 (408) 432-1900 l fax : (408) 434-0507 l telex : 499-3977 related parts see pcmcia product family table on the first page of this data sheet.

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